The current limit doesn't appear to be adjustable. There's no provision for discharging the output capacitor. I wonder if there should be a reverse diode across the pass transistors, and also wonder if their gate voltage limits might be exceeded?

In any event there's no substitute for breadboarding, and actually using it.

I'm working on something similar (and will publish it in due course).

Just one thing to think about: When paralleling the power transistors, the variation in Gate-Source voltage will cause a current imbalance. The cure is a small series resistor in series with the source lead. The criteria I am using is that the drop across this resistor is ~ 5X the worst case deviation in the G-S voltage spec. In my case, the FETs are speced at a GS voltage of 3-5 volts. The excursion from the mean is 1 volt, so I make the resistor drop 5 volts at maximum load.

You can of course match the FETs, but soldering in the extra resitor takes less time....

Yes, current imbalance is possible. However, I was thinking that using the balancing resistors in the source lead would worsen load regulation, and this is not what I want. Please correct me if my reasoning isn't OK.

Well, I actually didn't want to have adjustable current limit. I thought it would be OK if I could have fixed limit of 500 mA, which matches the current that my line transformer is capable of.



Do you mean a bleeder resistor?



IRF840 already have the reverse diode formed by the body-drain junction. So, if my understanding is correct, there is no need for a separate reverse diode across Q1 and Q2.



Looks like I forgot to take care of this. Thank you for the finding.



Of course. I'm planning to breadboard the design in about a week.

If the feedback is taken after the resistor(s), then regulation is not seriously affected----it's a function of the overall loop gain, I think.
It seemed to me that the only real penalty was a reduction in the maximum voltage available.

I'll post my schematic later, but--as stated--people will really want RESULTS.

I believe what you meant is this:



In this case, feedback is taken before the resistors, and this what I wanted to avoid. Unfortunately, I haven't devised a way of using LR8 to include balancing resistors into the feedback loop. How this would be possible?



Sure, I plan on sharing what I get when breadboarding the schematics. And thanks for your comments!

You should be able to take the feedback from the output terminal, instead of the LR8 output. A 10-15V zener connected G-S will protect the gate junction. I'd put 100 Ohm resistors (or ferrite beads) in each gate lead to help avoid HF oscillations.

This would be extremely interesting, indeed. However, I've been banging my head against the wall trying to figure out how to do this. If you can sketch a schematic or just tell where to connect the OUT and ADJ pins of LR8, I would be most grateful to you.

I humbly suggest that you use a diode. My (limited) understanding is that whatever is in the MOSFET will simply bypass flow around the MOSFET and possibly stresss the regulator. Consider if the supply is not turned on and you connect it across a charged capacitor. Suddenly, reverse voltage will appear across the regulator. The regulator's spec sheet says to protect against this with a diode.
I am not as well educated here as many of you so please forgive me. Why wouldn't you simply move the connection of R1 away from the regulator output to the supply output (on the output side of balancing resistors if you use them)? That is what is done in low voltage supplies isn't it? There might be stability problems I have no idea.

Here is my design--not finished and not tested.



Regardless of anything else, you definitely want the feedback taken from Vout.

I've done at least one flaky thing here: Keeping the low end at ~150volts let's me use cheap FETs

The cap marked "TBD" is my guess at where I will keep it from oscillating.

Someone asked about bleeding the output cap. If you are regulating, you dont NEED a big output cap.

Speaking of a big output cap how about just using one as a regulator?

With 2400 to 6800uF 450-500V caps becoming fairly available in surplus and Fleabay at low cost they may be worth looking at.

Ive used series/parallel strings of CDE industrial grade 2400uF across 1800-3000V and as long as the transformer is capable the regulation is well under 50V at 1-2A and close to perfect at smaller loads. The ESR is extremely low making them the ideal regulator.

At the above levels a step start in the AC line is required but life can be much simpler in a 0-500V bench supply starting with a Variac, a healthy transformer, a few diodes, and lots of C.

Ive nothing against SS but at the voltages I usually play with they scare me

Carl

I don't want to quibble, but a capacitor will not serve as a "regulator"--it only filters.

I do agree that the combination of a variac, transformer, rectifier, and a filter is a good solution for a **variable** supply, but it's not regulated.

In my case, I want to use the same transformer for filament supply and also for a small negative supply for bias. Thus, the variac approach is not applicable.......Plus, I like the challenge of figuring our a SIMPLE circuit design to make an inexpesive regulator.

Then dont until you try it. Then do the math.

I think we may have a semantics issue. When I think of "regulation", it means that the DC output of a supply is held stable in the face of either line or load variations. In fact, I think power supplies often specify both "line regulation" and "load regulation".

No amount of capacitance can perform regulation as defined above.

Obviously, no-one is required to use my definition....

Hello again,

First, thanks to everyone who replied with comments and ideas, which are much appreciated. Based on those, I came up with the next version of the PSU design.

I am planning to breadboard and test this schematic probably next weekend. For now, I would just be grateful for any comments. If you see something obviously wrong there, please speak up.

3 comments:

1. I would take the feedback from the output--that is what you want to be regulated.

2. The loop bandwidth is set by C3 and its net parallel R. This has different effects, depending on where you do the sensing. If you do #1, then you want the loop bandwidth as high as possible and still be stable.

3. Are you going to match the FETs for Vgs? If not, I would still use the series resistors.

<<Edit: Corrected some errors>>

Most regulated HV supplies have at least some capacitance across the output, a microfarad or two perhaps.

No semantics involved. Try it before dismissing outright and read up a bit on energy storage.

I just can't bring myself to trust solid state components with variable high voltage. Sure, you can make horizontal output transistors than can handle peaks of 1500 volts, but those are fixed circuits where the current and voltage remain stable--but what happens with severe power surges? Goodbye outputs.
With a power supply you have to expect the occasional short or over-current situation. SS is remarkable for not tolerating too much current, unless you build in a lot of extra circuitry. And if those power MOSFETs short, you will have full output right now; tubes don't do that. dvmo's circuit does not seem to have much in the way of current limiting or current sensing; this is essential in SS power supplies. If this power supply were for a fixed load circuit it might be acceptable.
Also, no ammeter or voltmeter is shown on the schematic.

Sorry, I am not dismissing your solution--it has a lot of merit. My only point was that--if you want a DC output voltage that does not vary with load--that cannot be done with a capacitor.